The physical limits of the miniaturization of microchips have been discussed for years. For electronic gadgets to further overcome these barriers to increase performance, developers are taking a new approach: making chips bigger.
Always smaller, always stronger has been the motto of chip development for decades. The number of transistors in semiconductors doubles every two years: Gordon Moore, who later co-founded Intel, made this observation in 1965 — called Moore’s law which is not a law of nature but became the mandate for the semiconductor industry.
However, this constant reduction is now reaching physical limits. And so chip developers are breaking new ground: Instead of flat semiconductors, they build chips in several layers, one on top of the other. At the same time, they expand the areas on which the silicon at the heart of our electronics is built. In a report, the Wall Street Journal compares this development with the sprawl of cities: While houses in the center become multistory buildings, suburbs around the city center are expanding.
While most chips are currently the size of small coins, some new generations of chips are expanding to the size of playing cards or even small plates. These “megachips” are not only used in supercomputers but can also be found in our households, writes the WSJ. Microsoft’s X-Box, like Sony’s PlayStation 5, uses such chips from Advanced Micro Systems. Apple utilizes this design for its new M1 Ultra, while Intel’s Ponte Vecchio processor is used in data centers and supercomputers.
New challenges for packaging
The multi-layer design of semiconductors or the integration of multiple chips over large areas brings new challenges. Among these challenges is enormous heat development, with the associated deformation of materials or the speed with which data is passed between individual components. Solving these challenges is the task of “packaging,” in which semiconductors are connected to other chips or components such as antennas or sensors via microscopically small wires.
Like elevators in high-rise buildings connect floors faster than it takes to walk from one end to the other in a long building, stacked chips bring faster connection paths and data transmission. Microchips are stacked directly on top of each other in “chiplets,” shortening data paths. Several such chiplets can eventually be connected to form “megachips” that deliver enormous power. According to the WSJ, Intel’s Ponte Vecchio graphics processor has 63 different chiplets stacked on top of and next to each other. An area of 3100 square millimeters accommodates more than 100 billion transistors. For comparison: A typical laptop chip is smaller than 150 square millimeters and has “only” 1.5 billion transistors.